Tender Notice

The division Smart Sensing and Electronics (SSE) of Fraunhofer IIS is currently looking for an exprienced contractor. The contractor shall provide services regarding the design and development of several demanding ASIC- and SoC-Projects. These projects are in bulk CMOS, FDSOI and GAA nanometer technologies. The contractor should also provide services on research for Interposer technologies and Interposer-Routing. The work includes place and route for digital design parts up to top level based on chip specification, Verilog netlists, SDC synthesis constraint data and physical synthesis floorplans. It also includes layout extraction and physical design verification (DRC, LVS). The contractor must define the implementation flow and document the design implementation sufficiently. Additionally, work on the Interposer layer in different technologies (silicon or organic) for Chiplet designs is required. All design and implementation work shall be executed in cooperation between IIS and the contractor. This will be done using Cadence (P&R) and Mentor (DRC, LVS) design software on IIS servers via remote or on-site access. The work shall be executed partially remote and partially on site based on project needs. Cadence design software, technology libraries, standard cells, memory and GPI/O models, as well as IP access will be made available on IIS servers. Mentor Calibre physical design verification software access will also be made available on IIS servers. All design and implementation work shall be carefully documented and reported between the project manager and contractor in a monthly progress report. The use of Cadence Innovus, Quantus, 2.5 D tools (P&R) and Mentor Calibre (DRC, LVS) software is mandatory. Knowledge about Cadence AI tools is also required. All milestones at the end of each project with the contractor’s responsibility will be pre-reviewed by the contractor on its own responsibility. The review documentation will be reviewed by IIS and contractor in meetings via internet or at Fraunhofer IIS Erlangen. Acceptance criteria include: design flow, implementation documentation, and design data base results available on IIS servers. The correct functionality of the layouted designs must have been successfully shown in review meetings and meet the expected results of the specification and project management. More information is available in the Tender Specification.

Support and development for ASICs and SoCs in nanometer technologies. Services on research for Interposer technologies and Interposer-Routing.